62nd ECTC Highlights


Best Papers

Best Session Paper
   Modeling and Reliability Characterization of Area-Array Electronics Subjected to High-G Mechanical Shock Up to    50,000G by Pradeep Lall, Kewal Patel, Ryan Lowe, Mark Strickland, Jim Blanche, Dave Geist, and Randall Montgomery – Auburn University

Best Interactive Presentation
   Void Formation During Reflow Soldering by Thomas D. Ewald – Robert Bosch GmbH, TU Dresden; Norbert Holle – Robert Bosch GmbH; and Klaus-Jürgen Wolter – TU Dresden

Outstanding Session Paper
   A 77-GHz SiGe Single-Chip Four-Channel Transceiver Module with Integrated Antennas in Embedded Wafer-Level BGA Package by M. Wojnowski – Infineon Technologies AG; C. Wagner – DICE GmbH & Co KG; R. Lachner, J. Böck, G. Sommer, and K. Pressel – Infineon Technologies AG

Outstanding Interactive Presentation
   3D Stacked Microfluidic Cooling for High Performance 3D ICs by Yue Zhang, Ashish Dembla, Yogendra Joshi, and Muhannad S. Bakir – Georgia Institute of Technology

Intel Best Student Paper
   Interlayer Dielectric Cracking in Back End of Line (BEOL) Stack by Sathyanarayanan Raghavan – Georgia Institute of Technology; Ilko Schmadlak – Freescale Semiconductor; and Suresh K. Sitaraman – Georgia Institute of Technology

Event Presentations

1.) ECTC Luncheon Keynote
   Bridging the Gap between Silicon and Packaging, Gregg Bartlett, CTO, GLOBALFOUNDRIES

2.) Special Session: Next Generation Packaging and Integration - The Transformed Role of the Packaging Foundry (chaired by Raj Pendse)
  1. Market and Packaging Trends, Mike Ma, SPIL, Taiwan
  2. Packaging Supply Chain: Market Trends and Materials, Daniel Tracy, SEMI, USA

3.) ECTC Panel Session: Power Electronics - A Booming Market (chaired by Rolf Aschenbrenner & Ricky Lee)
   1. Pioneering Innovative Packaging Technologies, Klaus-Dieter Lang, Fraunhofer IZM, Germany
   2. Packaging Challenges and Solutions for Silicon Carbide Power Electronics, Ljubisa Stevanovic, GE Global Research, USA
   3. Power Modules Packaging Technologies & Market, Lionel Cadix, Yole, France

4.) ECTC Plenary Session: Photonics - Expanding Markets & Emerging Technologies (chaired by Chris Bower)
   1. LED Packaging Challenges, Jeff Perkins, Yole, France
   2. Photonics Integration on Silicon, Timo Aalto, VTT, Finland

5.) CPMT Seminar: Advanced Coreless Package Substrate & Material Technologies (chaired by Kishio Yokouchi & Venky Sundaram)
   1. Coreless Packaging Technology for High-Performance Application, Yuji Nishitani, SONY, Japan
   2. Low Temperature Curable Polymer Dielectrics for Substrateless Package, Takeshi Eriguchi, Asahi Glass, Japan
   3. The Low Warpage Coreless Substrate for High Speed Large Size Die Packages, Masateru Koide, Fujitsu, Japan

Media Coverage

Chip Scale Review
   3-D Integration and Technology Gathers Momentum at ECTC 2012 by Ronald J. Molnar

Solid State Technology
   ECTC’s Packaging Themes Cover OSAT Capex, Power Electronics and LEDs, Collaboration, More by Sandra Winkler
   ECTC: Focus on 3D Integration and TSVs by Pete Singer
   Advances in Wafer Underfill Processing by Phil Garrou

3D InCites
   ECTC 2012 Wrap up in 3D by Francoise von Trapp (multiple articles and videos)

Electro IQ
   Insights From the Leading Edge 107: 2012 ECTC Part 1: Committees and Awards by Phil Garrou
   Insights From the Leading Edge 108: 2012 ECTC Part 2: NCF, WUF, MUF for Tight Pitch Assembly by Phil Garrou

Test, Assembly & Packaging TIMES
   ECTC Packs 4-Day Learning Fest into 62nd Annual Conference by Martin Hart (go to page 41)

3D Packaging
  Event Review: 62nd ECTC Addresses Microelectronics Industry Needs (go to page 26)