Technical Program

Program Sessions: Wednesday May 31st 9:30 AM – 12:35 PM

Session 5: Flexible Packaging and Chip-Package-Interaction
Committee: Thermal/Mechanical Simulation & Characterization
Room: Mediterranean 6

Session Co-Chairs:

Xuejun Fan
Lamar University
Email: [email protected]

Yong Liu
ON Semiconductor
Email: [email protected]

Papers:

1. Comparative Study of Process-Reliability Interaction of Additive Circuits With Low-Temperature Solders ECAs and Magnetically Oriented ACAs
Pradeep Lall – Auburn University
Jinesh Narangaparambil – Auburn University
Ved Soni – Auburn University
Scott Miller – NextFlex

3. Study on the Mechanical Behavior of Stress Holes in Multilayer RDL Fabrication of 2.5D Packages Based on Finite Element Method
Hu Zhen – JCET Advanced Packaging Co., Ltd.
Chen Haijie – JCET Advanced Packaging Co., Ltd.
Liu Haoyu – JCET Advanced Packaging Co., Ltd.
Xu Hong – JCET Advanced Packaging Co., Ltd.
Liu Tao – JCET Advanced Packaging Co., Ltd.
Zhang Jincheng – JCET Advanced Packaging Co., Ltd.
Wang Changwen – JCET Advanced Packaging Co., Ltd.
Xie Jielei – JCET Advanced Packaging Co., Ltd.
Guo Liang – JCET Advanced Packaging Co., Ltd.

4. Strain-Relief Patterns for Flexible Substrate-Supported Optimized Serpentine Configurations
Rui Chen – Georgia Institute of Technology
Colin Stewart – Georgia Institute of Technology
Suresh Sitaraman – Georgia Institute of Technology

5. Modeling and Measurement Correlation of the Impact of Underfill Filler Particle Density on Interfacial Delamination
Yutaka Suzuki – Texas Instruments, Inc.
Jaimal Williamson – Texas Instruments, Inc.
Li Jiang – Texas Instruments, Inc.
Rajen Murugan – Texas Instruments, Inc.

6. A Time and Cost-Efficient Design Methodology to Estimate Effective Thermal Conductivities in System-on-Chips With Composite Materials
Ki Wook Jung – Samsung Electronics Co., Ltd.-Foundry Business
Eunju Hwang – Samsung Electronics Co., Ltd.-Foundry Business
Jun Seomun – Samsung Electronics Co., Ltd.-Foundry Business
Sangyn Ed Kim – Samsung Electronics Co., Ltd.-Foundry Business

7. On the Effect of Partial Underfilling on the Fatigue Life of Flip-Chip Micro-Solder Bumps in a Heterogeneously Integrated TSI Package Using Finite Element Simulations
Sasi Kumar Tippabhotla – Institute of Microelectronics A*STAR
Ji Lin – Institute of Microelectronics A*STAR