Technical Program

Program Sessions: Thursday June 1st 9:30 AM – 12:35 PM

Session 15: Innovative Interposer and Through-Via Technologies
Committee: Interconnections
Room: Mediterranean 2 & 3

Session Co-Chairs:

C. Key Chung
TongFu Microelectronics Co., Ltd
Email: [email protected]

Chuan Seng Tan
Nanyang Technological University
Email: [email protected]

Papers:

1. Assembly-Based Through-X-Via (TXV) Integration Technology by Advanced Fan-Out Wafer-Level Packaging
Atsushi Shinoda – Tohoku University
Chang Liu – Tohoku University
Tadaaki Hoshi – Tohoku University
Jiayi Shen – Tohoku University
Yuki Susumago – Tohoku University
Hisashi Kino – Tohoku University
Tetsu Tanaka – Tohoku University
Takafumi Fukushima – Tohoku University

2. Three Dimensional Fan-Out Wafer-Level Packaging
Guangqi Ouyang – University of California, Los Angeles
Fukushima Takafumi – University of California, Los Angeles
Subramanian S. Iyer – University of California, Los Angeles

3. Study of High-Speed Interconnect Bridge (HSIB) for System-in-Package Application
Venkata Karthik Ceemakurthy – TU Chemnitz/Fraunhofer ENAS
Vikas Dubey – Fraunhofer ENAS
Dirk Wuensch – Fraunhofer ENAS
Maik Wiemer – Fraunhofer ENAS
Harald Kuhn – Fraunhofer ENAS

4. Integrated Optical Interconnect Systems (iOIS) for Si Photonics Applications in HPC
Harry Hsia – Taiwan Semiconductor Manufacturing Company, Ltd.
C.W. Tseng – Taiwan Semiconductor Manufacturing Company, Ltd.
Chih-Chieh Chang – Taiwan Semiconductor Manufacturing Company, Ltd.
Jiun Yi Wu – Taiwan Semiconductor Manufacturing Company, Ltd.
Shih-Peng Tai – Taiwan Semiconductor Manufacturing Company, Ltd.
S. W. Lu – Taiwan Semiconductor Manufacturing Company, Ltd.
Jason Wu – Taiwan Semiconductor Manufacturing Company, Ltd.
Chih-Hang Tung – Taiwan Semiconductor Manufacturing Company, Ltd.
C. S. Liu – Taiwan Semiconductor Manufacturing Company, Ltd.
Yutong Wu – Taiwan Semiconductor Manufacturing Company, Ltd.
K. C. Yee – Taiwan Semiconductor Manufacturing Company, Ltd.
Douglas C. H. Yu – Taiwan Semiconductor Manufacturing Company, Ltd.

5. Demonstration of a CMOS-Compatible, Superconducting Cryogenic Interposer for Advanced Quantum Processor
King Jien Chui – Institute of Microelectronics A*STAR
Yong Chyn Ng – Institute of Microelectronics A*STAR
Ya-Ching Tseng – Institute of Microelectronics A*STAR
Hongyu Li – Institute of Microelectronics A*STAR

6. Process Design Kit and Initial Demonstration of Digital Metal-Embedded Chip Assembly for High Density IO Fan-Out Packaging
Souheil Nadri – HRL Laboratories, LLC
Bor-An Clayton Tu – HRL Laboratories, LLC
Florian Herrault – PseudolithIC, Inc.
Hasan Sharifi – HRL Laboratories, LLC
Abdullah Khan – Cadence
David Schwan – Cadence
David Botticello – Cadence
Sanjana Das – Cadence
Daniel Kuzmenko – HRL Laboratories, LLC
Joel Wong – HRL Laboratories, LLC
Vu Phan – HRL Laboratories, LLC
Courtney Wilt – HRL Laboratories, LLC

7. 1.65 µm L/S High Density Interconnect on Organic Substrate by Advanced Semi-Additive Process for HPC Applications
Hussein Hamieh – University of Sherbrooke
Juliano Borges – University of Sherbrooke
Etienne Paradis – University of Sherbrooke
Yann Beilliard – University of Sherbrooke
Serge Ecoffey – University of Sherbrooke
Isabel De Sousa – IBM Canada, Ltd.
Martin Laliberte – IBM Canada, Ltd.
Dominique Drouin – University of Sherbrooke