Technical Program

Wednesday, May 31, 2017

Session 8: Singulation Process Developments
1:30 PM - 5:10 PM
Committee: Assembly & Manufacturing Technology
Room: Southern Hemisphere III

Session Co-Chairs:

Garry Cunningham
NGC
T +1-410-765-7859
Garry.Cunningham@ngc.com
Li Jiang
Texas Instruments
T +1-214-479-4537
l-jiang1@ti.com

Papers:

1. 1:30 PM - Expanding Film and Process for High Efficiency 5 Sides Protection and FO-WLP Fabrication
Kazutaka Honda - Hitachi Chemical Co.,Ltd.
Naoya Suzuki - Hitachi Chemical Co.,Ltd.
Toshihisa Nonaka - Hitachi Chemical Co.,Ltd.
Hirokazu Noma - Hitachi Chemical Co.,Ltd.
Yoshinobu Ozaki

2. 1:55 PM - Laser Multi Beam Full Cut Dicing of Wafer Level Chip-Scale Packages
Jeroen van Borkulo - ASM Pacific Technologies
Eric Tan - ASM Pacific Technologies
Richard van der Stam - ASM Pacific Technologies

3. 2:20 PM - Plasma Dicing 300mm Framed Wafers - Analysis Of Improvement in Die Strength and Cost Benefits for Thin Die Singulation
Richard Barnett - SPTS

4. 3:30 PM - Plasma Dicing Fully Integrated Process-Flows Suitable for BEOL Advanced Packaging Fabrications
Frank Wei - DISCO
Tomotaka Tabuchi - DISCO
Thierry Lazerand - Plasma-Therm
Christopher Johnston - Plasma-Therm
Kenneth Mackenzie - Plasma-Therm
Marco Notarianni - Plasma-Therm

5. 3:55 PM - Stealth Dicing Challenges for MEMS Wafer Applications
Daniel Ismael Cereno, - IME, A*STAR
Sunil Wickramanayaka - IME, A*STAR

6. 4:20 PM - A Novel Pick-Up and Place Process for FO-WLP Using Tape Expansion Machine Device
Shinya Takyu - LINTEC
Naoya Okamoto - LINTEC
Tadatomo Yamada - LINTEC
Toshiaki Menjo - LINTEC
Masatomo Nakamura - LINTEC

7. 4:45 PM - Investigation of Production Quality and Reliability Risk of ELK Wafer WLCSP Package
Pei-Haw Tsao - TSMC
T.M. Chen - TSMC
Y. L. Kuo - TSMC
C. M. Kuo - TSMC
Steven Hsu - TSMC
M. J. Lii - TSMC
L. H. Chu - TSMC