Technical Program

Friday, June 02, 2017

Session 29: Warpage Control and Substrates
8:00 AM - 11:40 AM
Committee: Assembly & Manufacturing Technology
Room: Americas Seminar

Session Co-Chairs:

Paul Tiner
Texas Instruments
T +1-469-471-3565
p-tiner@ti.com
Paul Houston
Engent
T +1-770-280-4238
paul.houston@engentaat.com

Papers:

1. 8:00 AM - Innovative Advances in Copper Electroplating for IC Substrate Manufacturing
Kousik Ganesan - Intel
Yang Sun - Intel
Chandrashekhar Pendyala - Intel
Thomas Heaton - Intel
Radek Chalupa - Intel
Marcel Wall - Intel
Suddhasattwa Nad - Intel
Rahul Manepalli - Intel
Amaneh Tasooji - Arizona State University

2. 8:25 AM - Reflow Warpage Induced Interconnect Gaps between Package/PCB and PoP Top/Bottom Packages
Kaiqiang Peng - Huawei
Wei Xu - Huawei
Zhenkai Qin - Huawei
Lei Feng - Huawei
Linlin Lai - Huawei
Wei Hu Koh - Huawei

3. 8:50 AM - Warpage Tuning Study for Multi-Chip Last Fan-Out Wafer Level Package
Hung-Yuan Li - SPIL
Allen Chen - SPIL
Sam Peng - SPIL
George Pan - SPIL
Stephen Chen - SPIL

4. 10:00 AM - Warpage Characterization of Glass Interposer Package Development
Meng-Kai Shih - ASE
Charles Hsu - ASE
Yungshun Chang - ASE
Karenyu Chen - ASE
Ian Hu - ASE
David Tarng - ASE
CP Hung - ASE
Teck Lee - ASE

5. 10:25 AM - The Influence of Resin Coverage on Reliability for Solder Joints Formed by One-Pass Reflow Using Resin Reinforced Low Temperature Solder Paste
Atsushi Yamaguchi - Panasonic
Yasuo Fukuhara - Panasonic
Andy Behr - Panasonic
Naomichi Ohashi - Panasonic
Yasuhiro Suzuki - Panasonic
Hirohisa Hino - Panasonic

6. 10:50 AM - Analysis of System-Level Reliability of Single-Chip Glass BGA Packages with Advanced Solders and Polymer Collars
Vidya Jayaram - Georgia Institute of Technology
Scott McCann - Georgia Institute of Technology
Bhupender Singh - Georgia Institute of Technology
Pulugurtha Markondeya Raj - Georgia Institute of Technology
Hiro Matsuura - NTK/NGK
Yutaka Takagi - NTK/NGK
Vanessa Smet - Georgia Institute of Technology
Rao Tummala - Georgia Institute of Technology

7. 11:15 AM - A Comprehensive Study on Stress and Warpage by Design, Simulation and Fabrication of RDL-First Panel Level Fan-Out Technology for Advanced Package
Puru Lin - Unimicron Technology Corp.
Cheng-Ta Ko - Unimicron Technology Corp.
Yu-Hua Chen - Unimicron Technology Corp.
Wei-Tse Ho - Unimicron Technology Corp.
Chi-Hai Kuo - Unimicron Technology Corp.
Kuan-Wen Chen - Unimicron Technology Corp.
Tzyy-Jang Tseng - Unimicron Technology Corp.