Technical Program

Friday, June 01, 2018

Session 25: Wafer Level Packaging and Fan-In/Fan-Out Structures & Materials
8:00 AM - 11:40 AM
Committee: Packaging Technologies

Session Co-Chairs:

Albert Lan
Applied Materials
T +886-3-5793588
Albert_Lan@amat.com
Christophe Zincke
ASE
T +3362856 6802
Christophe.Zinck@aseeu.com

Papers:

1. 8:00 AM - 3D Fan-Out Package Technology with Photosensitive Through Mold Interconnects
Kentaro Mori - Toshiba Electronic Devices and Storage Corporation
Soichi Yamashita - Toshiba Electronic Devices and Storage Corporation
Takafumi Fukuda - Toshiba Development & Engineering Corporation
Masahiro Sekiguchi - Toshiba Electronic Devices and Storage Corporation
Hirokazu Ezawa - Toshiba Memory Corporation
Shuzo Akejima - Toshiba Electronic Devices and Storage Corporation

2. 8:25 AM - Effects of the Materials Properties of Epoxy Molding Films (EMFs) on Fan-Out Packages (FOPs) Characteristics
SangMyung Shin - KAIST
HanMin Lee - KAIST
JunMo Kim - KAIST
Tae-Ik Lee - KAIST
Taek-Soo Kim - KAIST
Youjin Kyung - LG Chem
Minsu Jeong - LG Chem
Kwangjoo Lee - LG Chem
Kyung-Wook Paik - KAIST

3. 8:50 AM - Mechanism of Moldable Underfill (MUF) Process for RDL-1st Fan-Out Panel Level Packaging
Lin bu - IME
Faxing Che - IME
Vempati Srinivasa Rao - IME
Xiaowu Zhang - IME

4. 10:00 AM - Study of the Board Level Reliability Performance of a Large 0.3 mm Pitch Wafer Level Package
Bernd Waidhas - Intel Deutschland GmbH
Jan Proschwitz - Intel Deutschland GmbH
Christoph Pietryga - Intel Deutschland GmbH
Thomas Wagner - Intel Deutschland GmbH
Beth Keser - Intel Deutschland GmbH

5. 10:25 AM - Study of Board Level Reliability of eWLB (embedded wafer level BGA) for 0.35mm Ball Pitch
Seung Wook Yoon - STATS ChipPAC JCET Group
Yeow Kheng Lim - STATS ChipPAC JCET Group
Seng Guang Chow - STATS ChipPAC JCET Group
Kang Hai Lee - STATS ChipPAC JCET Group
NW Liu - Mediatek
Yenyao Chi - Mediatek
Benson Lin - Mediatek

6. 10:50 AM - Board Level Reliability Study of Fan-Out Single Die Package with 350um Bump Pitch
Chieh Lung Lai - Siliconware Precision Industries Co., Ltd.
Gu Yan Lin - Siliconware Precision Industries Co., Ltd.
Tz Yuan Chao - Siliconware Precision Industries Co., Ltd.
Chun Hung Lu - Siliconware Precision Industries Co., Ltd.
Yih Sin Chen - Siliconware Precision Industries Co., Ltd.
Feng Lung Chien - Siliconware Precision Industries Co., Ltd.

7. 11:15 AM - The Analysis for Bump Resistance Improvement by Optimizing the Sputter Condition
Clair Tsai - Taiwan Semiconductor Manufacturing Company Limited
C. N. Wang - Taiwan Semiconductor Manufacturing Company Limited
T. L. Yang - Taiwan Semiconductor Manufacturing Company Limited
W. C. Wu - Taiwan Semiconductor Manufacturing Company Limited
C. S. Liu - Taiwan Semiconductor Manufacturing Company Limited
J.M. Chiu - Taiwan Semiconductor Manufacturing Company Limited
Y. F. Chen - Taiwan Semiconductor Manufacturing Company Limited
Harry Ku - Taiwan Semiconductor Manufacturing Company Limited
Kirin Wang - Taiwan Semiconductor Manufacturing Company Limited
C.H. Su - Taiwan Semiconductor Manufacturing Company Limited